Phenomenological model of false lock in the sampling phase-locked loop

Andrew Béla Frigyik, G. Kolumbán
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引用次数: 2

Abstract

In addition to the stable fixed point which should be achieved under steady-state conditions, the sampling phase-locked loop (SPLL) implemented with a loop filter has another stable attractor in which an unwanted periodic solution, called false lock, develops in the loop. After the acquisition process, the SPLL either reaches the desired fixed point or gets into false lock, depending on the initial conditions. In every implemented circuit, the development of false lock has to be prevented. Although the false lock problem was reported earlier, an exact model to describe the behavior of SPLL in false lock has not yet been published. This paper propose a phenomenological model to explain why the false lock can develop and to describe the operation of SPLL in false lock.
采样锁相环误锁的现象学模型
除了在稳态条件下应该达到的稳定不动点外,用环路滤波器实现的采样锁相环(SPLL)还有另一个稳定吸引子,其中环路中会产生一个不需要的周期解,称为假锁。在获取过程之后,SPLL要么达到期望的固定点,要么进入假锁定,这取决于初始条件。在每一个实现的电路中,都必须防止假锁的产生。虽然早前就报道过假锁问题,但目前还没有一个准确的模型来描述假锁下SPLL的行为。本文提出了一个现象学模型来解释假锁产生的原因,并描述了SPLL在假锁中的运行情况。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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