Capacitive coupling and quantized feedback applied to conventional CMOS technology

Abstract

An on-chip capacitor which is formed under a bonding pad is used to block the DC level of an external input signal. Quantized feedback using a self-triggered decision circuit is used to establish local DC voltage levels in the receiver and eliminate the "zero wander" effect. Measurement of a 0.5 /spl mu/m CMOS chip has demonstrated that: a BER (Bit Error Rate) test for a 2/sup 31/-1 sequence showed no errors at 600 Mb/s; the circuit detected a low frequency signal of 1 Kb/s indicating that coding is not required; and the input signal can be DC biased anywhere, limited only by the ESD diodes, between VDD and VSS without affecting the final recovered CMOS waveform.