V. Issakov, R. Ciocoveanu, R. Weigel, A. Geiselbrechtinger, J. Rimmelspacher
{"title":"Highly-Integrated Low-Power 60 GHz Multichannel Transceiver for Radar Applications in 28 nm CMOS","authors":"V. Issakov, R. Ciocoveanu, R. Weigel, A. Geiselbrechtinger, J. Rimmelspacher","doi":"10.1109/mwsym.2019.8700977","DOIUrl":null,"url":null,"abstract":"We present a highly-integrated low-power 60 GHz multi-channel transceiver realized in a 28 nm bulk CMOS technology. The circuit integrates three receive (RX) and two transmit (TX) channels. A receive channel includes an LNA, a passive mixer and a transimpedance amplifier (TIA), while a transmit channel contains a three-stage transformer-coupled differential power amplifier (PA). Additionally, the transceiver integrates a local oscillator (LO) signal generation network comprising a voltage-controlled oscillator (VCO), LO buffers, power splitters, frequency divider and a passive distribution network. The VCO is realized as a push-push cross-coupled topology and is continuously tunable in the frequency range 57-to-72 GHz, while achieving a measured phase noise of −84 dBc/Hz at 1 MHz offset at 60 GHz. The entire transceiver dissipates 342 mW using a single 0.9 V supply. A single RX channel draws 33 mA, while a single TX consumes 43 mA. The circuit including pads occupies a chip area of only 1.9 mm × 2.5 mm, which is limited only by the separation necessary for isolation between the channels. The transceiver provides a competitive performance and is suitable for 60 GHz continuous-wave radar applications.","PeriodicalId":6720,"journal":{"name":"2019 IEEE MTT-S International Microwave Symposium (IMS)","volume":"10 1","pages":"650-653"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE MTT-S International Microwave Symposium (IMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/mwsym.2019.8700977","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
We present a highly-integrated low-power 60 GHz multi-channel transceiver realized in a 28 nm bulk CMOS technology. The circuit integrates three receive (RX) and two transmit (TX) channels. A receive channel includes an LNA, a passive mixer and a transimpedance amplifier (TIA), while a transmit channel contains a three-stage transformer-coupled differential power amplifier (PA). Additionally, the transceiver integrates a local oscillator (LO) signal generation network comprising a voltage-controlled oscillator (VCO), LO buffers, power splitters, frequency divider and a passive distribution network. The VCO is realized as a push-push cross-coupled topology and is continuously tunable in the frequency range 57-to-72 GHz, while achieving a measured phase noise of −84 dBc/Hz at 1 MHz offset at 60 GHz. The entire transceiver dissipates 342 mW using a single 0.9 V supply. A single RX channel draws 33 mA, while a single TX consumes 43 mA. The circuit including pads occupies a chip area of only 1.9 mm × 2.5 mm, which is limited only by the separation necessary for isolation between the channels. The transceiver provides a competitive performance and is suitable for 60 GHz continuous-wave radar applications.