A design of ΔΣ A‐D converter

Abstract

The ΔΣ modulation A-D converter is widely used in practice as a high-resolution A-D converter suitable for LSI implementation. However, in general, if the order of the loop filter in the ΔΣ modulation A-D converter exceeds three, stability of the circuit is no longer guaranteed. In this paper, the relationship of the loop filter coefficients in the A-D converter is studied. Based on the results, a design method is proposed for a higher-order ΔΣ modulation A-D converter such that stability is assured while maximizing the signal-to-noise (SN) ratio. Further, the results of a PSPICE simulation and experimental results obtained using individual components confirm that the present design method is sufficiently practical. © 2007 Wiley Periodicals, Inc. Electron Comm Jpn Pt 3, 90(6): 10– 16, 2007; Published online in Wiley InterScience (www.interscience. wiley.com). DOI 10.1002/ecjc.20269