A novel approach for USB2.0 validation on System on Chip

M. Pandey, Shwetank Shekhar, Joginder Singh, G. Agarwal, Nitin Saxena
{"title":"A novel approach for USB2.0 validation on System on Chip","authors":"M. Pandey, Shwetank Shekhar, Joginder Singh, G. Agarwal, Nitin Saxena","doi":"10.1109/ICCCNT.2013.6726615","DOIUrl":null,"url":null,"abstract":"In peripheral to peripheral communication, USB2.0 continues to occupy prominent position. With the emergence of USB2.0 peripherals, figuring out a standard, reliable and robust approach that can validate USB2.0 on System on Chip (SoC) is the need of an hour. The performance of USB depends fundamentally on electrical characteristics. Using this innovative approach (validation using U-Boot framework) we have root-caused several notorious issues which were hard to narrow down using legacy approach. This methodology possesses both the legacy capability of low level programming (JTAG) as well as of application level (High Level) programming (Linux). The paper is presented using case study of some issues which were reflected in the system using this methodology only.","PeriodicalId":6330,"journal":{"name":"2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2013-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCNT.2013.6726615","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

In peripheral to peripheral communication, USB2.0 continues to occupy prominent position. With the emergence of USB2.0 peripherals, figuring out a standard, reliable and robust approach that can validate USB2.0 on System on Chip (SoC) is the need of an hour. The performance of USB depends fundamentally on electrical characteristics. Using this innovative approach (validation using U-Boot framework) we have root-caused several notorious issues which were hard to narrow down using legacy approach. This methodology possesses both the legacy capability of low level programming (JTAG) as well as of application level (High Level) programming (Linux). The paper is presented using case study of some issues which were reflected in the system using this methodology only.
USB2.0在片上系统验证的新方法
在外设到外设通信中,USB2.0继续占据着突出的地位。随着USB2.0外设的出现,找出一个标准的、可靠的、健壮的方法来验证USB2.0在片上系统(SoC)是需要一个小时的。USB的性能基本上取决于电气特性。使用这种创新的方法(使用U-Boot框架进行验证),我们已经从根本上解决了几个臭名昭著的问题,这些问题很难使用传统方法来缩小范围。这种方法既具有低级编程(JTAG)的遗留功能,也具有应用程序级编程(高级)的遗留功能(Linux)。本文仅使用这种方法对系统中反映的一些问题进行了案例研究。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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