SIBA: a VLSI systolic array chip for image processing

Abstract

Describes the design and implementation of a two-dimensional systolic array processor for applications in image processing and computer vision. The processor architecture is based on a SIMD array of 4-bit processing elements, interconnected by a mesh network with four nearest neighbors. The PE array is programmable allowing the user to develop application-specific algorithms for performing analysis on image data. A prototype VLSI chip has been designed implementing a single PE and has been submitted for fabrication. The chip is expected to operate at 25 MHz.<>