{"title":"A 31 pW-to-113 nW Hybrid BJT and CMOS Voltage Reference with 3.6% ±3σ-inaccuracy from 0○C to 170 ○C for Low-Power High-Temperature IoT Systems","authors":"Inhee Lee, D. Blaauw","doi":"10.23919/VLSIC.2019.8778113","DOIUrl":null,"url":null,"abstract":"This paper proposes a low-power voltage reference generating 736 mV from 0 ○C to 170 ○C for low-power high-temperature IoT sensing systems. Using subthreshold current, a BJT diode develops a process-insensitive complementary-to-absolute-temperature voltage, and stacked CMOS transistors compensate the temperature sensitive by adding a proportional-to-absolute-temperature voltage. To maintain a reference voltage at high temperature, the circuit is designed considering pwell-to-deep nwell diode leakage. 76 samples from 3 different wafers, fabricated in a 180 nm process, show a ±3σ inaccuracy of 3.6% from 0 ○C to 170 ○C without any trimming. It consumes 31 pW at 27 ○C and 113 nW at 170 ○C from 0.9 V supply.","PeriodicalId":6707,"journal":{"name":"2019 Symposium on VLSI Circuits","volume":"3 1","pages":"C142-C143"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSIC.2019.8778113","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18
Abstract
This paper proposes a low-power voltage reference generating 736 mV from 0 ○C to 170 ○C for low-power high-temperature IoT sensing systems. Using subthreshold current, a BJT diode develops a process-insensitive complementary-to-absolute-temperature voltage, and stacked CMOS transistors compensate the temperature sensitive by adding a proportional-to-absolute-temperature voltage. To maintain a reference voltage at high temperature, the circuit is designed considering pwell-to-deep nwell diode leakage. 76 samples from 3 different wafers, fabricated in a 180 nm process, show a ±3σ inaccuracy of 3.6% from 0 ○C to 170 ○C without any trimming. It consumes 31 pW at 27 ○C and 113 nW at 170 ○C from 0.9 V supply.