The Development of a High Speed8-bit Pipelined ADC on 0.25um BiCMOS

Abstract

The two stage pipelined ADC can keep high speed and low power consumption while proceeding high conversion accuracy using uncomplicated design techniques. This paper presents a 8-bit pipelined analog-to-digital converter (ADC) based on 0,25um BiCMOS process. The proposed design methods are proven by measuring microchips on sampling frequency up to 1GHz. The results show that the dynamic parameters - signal to noise ratio(SNR), effective number of bits (ENOB) and spurious free dynamic range (SFDR) are 47dB, 7.3, 42dB respectively. The differentials (DNL) and integral (INL) nonlinearities have high accuracy also – less than 0,5 LSB. The full power consumption of microchip is within 1,3W.