{"title":"Time-to-Digit Converter Based on radiation-tolerant FPGA","authors":"M. Peca, M. Vacek, V. Michálek","doi":"10.1109/EFTF.2012.6502384","DOIUrl":null,"url":null,"abstract":"Architecture of a time-to-digit converter (TDC) is presented. TDC is an electronic device which measures time of arrival of discrete electronic pulses, with respect to reference time base. Our work on TDC is motivated by its applications in field of long-range laser distance measurement and time synchronization. Unlike earlier time interpolation methods, we have chosen all-digital approach based on pulse propagation through tapped delay line. We do not expect it could outperform recent invention of time interpolation using narrow-band filter excitation [1], [2]. However, our approach relies on a standard digital circuitry only. With space applications in mind, we are implementing the TDC into a space qualified, radiation-tolerant field-programmable gate array (FPGA). On top of related works [4] and [5] on all-digital TDCs, delay line, we try to gather more complete information about the sampled pulse. It is done by sampling of whole bit vector, corresponding to all of the delay line taps. A calibration method based on random pulse source is discussed, including preliminary results. Impact of physical FPGA cell placement on resulting time measurement granularity is observed. Actually measured jitter distribution is compared to normal distribution function, giving an insight of absolute accuracy limit of our approach within the given FPGA platform.","PeriodicalId":6409,"journal":{"name":"2012 European Frequency and Time Forum","volume":"42 1","pages":"286-289"},"PeriodicalIF":0.0000,"publicationDate":"2012-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 European Frequency and Time Forum","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EFTF.2012.6502384","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Architecture of a time-to-digit converter (TDC) is presented. TDC is an electronic device which measures time of arrival of discrete electronic pulses, with respect to reference time base. Our work on TDC is motivated by its applications in field of long-range laser distance measurement and time synchronization. Unlike earlier time interpolation methods, we have chosen all-digital approach based on pulse propagation through tapped delay line. We do not expect it could outperform recent invention of time interpolation using narrow-band filter excitation [1], [2]. However, our approach relies on a standard digital circuitry only. With space applications in mind, we are implementing the TDC into a space qualified, radiation-tolerant field-programmable gate array (FPGA). On top of related works [4] and [5] on all-digital TDCs, delay line, we try to gather more complete information about the sampled pulse. It is done by sampling of whole bit vector, corresponding to all of the delay line taps. A calibration method based on random pulse source is discussed, including preliminary results. Impact of physical FPGA cell placement on resulting time measurement granularity is observed. Actually measured jitter distribution is compared to normal distribution function, giving an insight of absolute accuracy limit of our approach within the given FPGA platform.