S. Datta, A. Ali, S. Mookerjea, V. Saripalli, L. Liu, S. Eachempati, T. Mayer, V. Narayanan
{"title":"Non-silicon logic elements on silicon for extreme voltage scaling","authors":"S. Datta, A. Ali, S. Mookerjea, V. Saripalli, L. Liu, S. Eachempati, T. Mayer, V. Narayanan","doi":"10.1109/SNW.2010.5562592","DOIUrl":null,"url":null,"abstract":"Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures — quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"22 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Silicon Nanoelectronics Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SNW.2010.5562592","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Continued miniaturization of transistors has resulted in unprecedented increase in device count leading to high compute capability albeit with increase in energy consumption. Here, we present our research on advanced non silicon electronic material systems and novel device architectures — quantum-well FETs, inter-band tunnel FETs and tunnel-coupled nanodot devices - for heterogeneous integration on Si substrate. The goal is to demonstrate a compelling information processing platform that allows very aggressive scaling of supply voltage, thereby reducing energy consumption in future computing systems.