{"title":"Design, manufacture and test-quality cost estimation","authors":"J. M. Gilbert, I. Bell, D. R. Johnson","doi":"10.1109/ISQED.2002.996730","DOIUrl":null,"url":null,"abstract":"This paper describes the adaptation of the conformability analysis technique to the assessment of functional, manufacturing and test capability of PCB level electronic circuits. It combines process capability indices and failure modes and effects analysis (FMEA) with cost mapping to allow the quality costs associated with design and manufacture induced faults to be estimated and the effectiveness of test strategies in reducing these costs to be determined. It allows the trade-off between these costs and the component, manufacturing process and test costs to be explored. The technique is particularly applicable to the relatively low complexity analogue and mixed signal safety critical circuits typically found in automotive and aircraft electronic systems.","PeriodicalId":20510,"journal":{"name":"Proceedings International Symposium on Quality Electronic Design","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2002.996730","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper describes the adaptation of the conformability analysis technique to the assessment of functional, manufacturing and test capability of PCB level electronic circuits. It combines process capability indices and failure modes and effects analysis (FMEA) with cost mapping to allow the quality costs associated with design and manufacture induced faults to be estimated and the effectiveness of test strategies in reducing these costs to be determined. It allows the trade-off between these costs and the component, manufacturing process and test costs to be explored. The technique is particularly applicable to the relatively low complexity analogue and mixed signal safety critical circuits typically found in automotive and aircraft electronic systems.