Reconfigurable high efficiency power amplifier with tunable coupling coefficient based transformer for 5G applications

Sheikh Nijam Ali, Pawan Agarwal, Joe Baylon, D. Heo
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引用次数: 23

Abstract

A frequency reconfigurable high efficiency power amplifier (PA) is presented for 5G applications using on-chip switchable matching networks. To cope with increased gate-drain capacitance (Cgd) in deep submicron CMOS PA design at mm-Wave frequencies, a tunable coupling-coefficient based transformer is proposed. This technique dramatically improves the neutralization of Cgd in a common-source PA while maximizing output power and efficiency. To reconfigure the PA between 24 GHz and 28 GHz, a low-loss reconfigurable matching topology is adopted using a switched substrate-shield inductor. Using the proposed techniques, a single-stage reconfigurable class-AB PA is demonstrated in 65 nm CMOS, achieving 42.6% maximum power added efficiency (PAEmax), 14.7 dBm maximum output power (Po, max) at 24 GHz and 40.1% PAEmax, 14.4 dBm Po, max at 28 GHz. The PA occupies a core area of 0.11 mm2 only.
基于可调耦合系数变压器的5G应用可重构高效功率放大器
提出了一种基于片上可切换匹配网络的5G应用频率可重构高效功率放大器(PA)。为解决深亚微米CMOS放大器在毫米波频率下栅极漏极电容增大的问题,提出了一种基于耦合系数可调的变压器。该技术极大地提高了在共源PA中对Cgd的中和,同时最大限度地提高了输出功率和效率。为了在24 GHz和28 GHz之间重新配置PA,采用了一种低损耗的可重构匹配拓扑,并使用了开关基板屏蔽电感。利用所提出的技术,在65纳米CMOS上实现了单级可重构ab类放大器,在24 GHz时实现42.6%的最大功率增加效率(PAEmax),最大输出功率(Po, max)为14.7 dBm,在28 GHz时实现40.1%的PAEmax,最大输出功率(Po, max)为14.4 dBm Po, max。PA的核心面积仅为0.11 mm2。
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