The systolic reconfigurable mesh

IF 0.5 Q4 COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS
M. Eshaghian-Wilner, Russ Miller
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引用次数: 11

Abstract

In this paper, we introduce the Systolic Reconfigurable Mesh (SRM), which combines aspects of the reconfigurable mesh with that of systolic arrays. Every processor controls a local switch that can be reconfigured during every clock cycle in order to control the physical connections between its four bi-directional bus lines. Data is input on one side of the systolic reconfigurable mesh and output from another side, one row/column per unit time. Efficient algorithms are presented for intermediate-level vision tasks, including histograming, connectivity, convexity, and proximity.
收缩可重构网格
在本文中,我们介绍了收缩可重构网格(SRM),它结合了收缩阵列的可重构网格的各个方面。每个处理器控制一个本地开关,该开关可以在每个时钟周期内重新配置,以控制其四条双向总线之间的物理连接。数据在收缩可重构网格的一侧输入,从另一侧输出,每单位时间一行/列。提出了用于中级视觉任务的高效算法,包括直方图、连通性、凸性和接近性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Parallel Processing Letters
Parallel Processing Letters COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS-
CiteScore
0.90
自引率
25.00%
发文量
12
期刊介绍: Parallel Processing Letters (PPL) aims to rapidly disseminate results on a worldwide basis in the field of parallel processing in the form of short papers. It fills the need for an information vehicle which can convey recent achievements and further the exchange of scientific information in the field. This journal has a wide scope and topics covered included: - design and analysis of parallel and distributed algorithms - theory of parallel computation - parallel programming languages - parallel programming environments - parallel architectures and VLSI circuits
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