A ICIGH DENSITY FLASH MEMORY PPGA FAMILY

Abstract

An NMOS transistor switch, direct coupled to a Flash memory cell without the use of a sense amp, is the basis for a high density FPGA. The switch is capable of transmitting the full digital switching voltage; novel circuit design techniques prevent the generation of hot electrons which would otherwise deprogram the memory during normal operation. The small programmable Flash switching element facilitates use of a fine grain architecture optimized for design techniques based upon high level design and synthesis. At 0 . 8 ~ technology, the largest member of the family is rated at 100,000 gates. Future scaling to 0 . 3 5 ~ technology will make practical a 400,000 gate device.