Design of a 2.4GHz power amplifier

Xiangning Fan, Chen Xu, Jiakai Lu, Zaijun Hua
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Abstract

This paper presents the design of a 2.4GHz power amplifier (PA) with high efficiency and the PA is implemented in 0.18μm RF CMOS process. Differential structure is used to reduce the effect of source inductance on the circuit. Output matching network is designed to reduce the chip area. Test results show that with the supply voltage 1V, the maximum output power is about 8dBm, and the maximum PAE is 19%. When the input power is -10dBm, S11 is lower than -23dB, and S22 is lower than -9dB.
2.4GHz功率放大器的设计
本文设计了一种高效率的2.4GHz功率放大器,该放大器采用0.18μm RF CMOS工艺实现。差分结构是为了减小源电感对电路的影响。为了减小芯片面积,设计了输出匹配网络。测试结果表明,在电源电压1V时,最大输出功率约为8dBm,最大PAE为19%。当输入功率为-10dBm时,S11小于-23dB, S22小于-9dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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