Performance comparison of an error correction technique in memory

Abstract

Memories are always sensitive to soft errors which affect memory reliability. A common method for protecting memories from soft errors is the use of Error Correcting Codes (ECC). As technology shrinks, Multiple Cell Upsets (MCU) pose a major issue in the reliability of memories exposed to radiation environments. Here a Decimal Matrix Code (DMC) based on divide-symbol is used to enhance memory reliability. Large number of redundant bits are used in this approach. A comparison was made by implementing the design by using different adder structures such as Ripple carry, Carry lookahead and Kogge Stone adder. The design was modeled using VHDL, simulated and synthesized using Xilinx IS E 14.2. The results show that the design implemented by using Kogge stone adder has higher performance.