Demonstration of Charge Trap Flash Bit-Cell in 180nm CMOS Logic Foundry

Abstract

Embedded non-volatile memory demand has increased manifolds in the recent time because it offers increased functionality and security for the systems. Microcontrollers, secure microprocessor need both advanced logic and NVM on the same die. Flash memory is the most mature memory used as Multi-Time Programmable Non-Volatile Memory (NVM). Traditionally Floating gate flash memory is the most commonly used flash technology where the charge is stored on the conducting floating gate. Floating gate memory is difficult to integrate in the logic process due to complex process integration and need 8-9 extra masks in the logic process to integrate flash technology. In this paper, we demonstrate Si3 N44 Charge Trap Flash (CTF) technology in 180nm CMOS fab. CTF is relatively easy to integrate and require few masks. The initial results show millisecond Program/Erase(P/E) speed, memory window of more than 1V after 1000 cycles and excellent retention with no bit flip after $250^{\circ}\mathrm{C}$ bake for 6 hours.