A thermal-aware superscalar microprocessor

Abstract

A thermal-aware technique is proposed to minimize the performance impact when thermal/power control mechanism is triggered. This technique, called thermal-aware microprocessor (TAM), uses on-chip thermal sensors to detect hot-spots within the microprocessor die. There is a secondary pipeline within the core. It is architecturally simple with ultra low power implementation. This secondary pipeline has two main functions: 1. thermal relieve; 2. ultra low power implementation for certain mobile environment (such as any where any time email connect function). When temperature exceeds a given threshold, the core superscalar pipelines are clock-gated while a secondary in-order pipeline is engaged. Since the secondary pipeline consumes much less power, it will have a much lower temperature, and therefore, it will provide a temporary thermal relieve to the core pipelines when the thermal/power mechanism is triggered. This relief reduces energy loss due to leakage, prevents overheating to improve product reliability, and eases cost for thermal solutions. The TAM can also combine with other low power techniques such voltage scaling to achieve ultra low power.