Sewook Hwang, Sungjun Moon, Junyoung Song, Chulwoo Kim
{"title":"A 32 Gb/s Rx only equalization transceiver with 1-tap speculative FIR and 2-tap direct IIR DFE","authors":"Sewook Hwang, Sungjun Moon, Junyoung Song, Chulwoo Kim","doi":"10.1109/VLSIC.2016.7573473","DOIUrl":null,"url":null,"abstract":"This paper presents an Rx only equalization (ROE) technique that eliminates all Tx equalizations to reduce power dissipation, circuit complexity, and cost. The proposed Rx consists of a CTLE, a 1-tap speculative FIR and 2-tap direct IIR DFE. A simpler Tx architecture owing to the ROE facilitates a wide bandwidth and energy efficient dual-mode (differential and single-ended) Tx operation. The proposed Tx consists of dual-mode 2:1 serializer/pre-drivers and main drivers. The transceiver was fabricated in a 65 nm CMOS technology. The Rx achieves BER <; 10<;sup>-12<;/sup> over a -22 dB loss PCB channel at 32 Gb/s with 0.62 pJ/b energy efficiency, and occupies 0.024 mm<;sup>2<;/sup>. The Tx has only 0.77 pJ/b and 0.40 pJ/b energy efficiency at 32 Gb/s in differential mode, and 32 Gb/s/pin in single-ended mode, respectively, and occupies only 0.002 mm<;sup>2<;/sup>.","PeriodicalId":6512,"journal":{"name":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","volume":"102 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2016.7573473","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents an Rx only equalization (ROE) technique that eliminates all Tx equalizations to reduce power dissipation, circuit complexity, and cost. The proposed Rx consists of a CTLE, a 1-tap speculative FIR and 2-tap direct IIR DFE. A simpler Tx architecture owing to the ROE facilitates a wide bandwidth and energy efficient dual-mode (differential and single-ended) Tx operation. The proposed Tx consists of dual-mode 2:1 serializer/pre-drivers and main drivers. The transceiver was fabricated in a 65 nm CMOS technology. The Rx achieves BER <; 10<;sup>-12<;/sup> over a -22 dB loss PCB channel at 32 Gb/s with 0.62 pJ/b energy efficiency, and occupies 0.024 mm<;sup>2<;/sup>. The Tx has only 0.77 pJ/b and 0.40 pJ/b energy efficiency at 32 Gb/s in differential mode, and 32 Gb/s/pin in single-ended mode, respectively, and occupies only 0.002 mm<;sup>2<;/sup>.