SRAM embedded memory with low cost, flash EEPROM-switch-controlled redundancy

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044) Pub Date : 2000-05-21 DOI:10.1109/CICC.2000.852668

R. McPartland, D. Loeper, F. Higgins, Raj Singh, G. MacDonald, G. Komoriya, S. Aymeloglu, M. DePaolis, C. Leung

引用次数: 13

Abstract

This paper describes the use of low cost, flash EEPROM switches to control redundancy in SRAM embedded memories. Flash cell design, operation and process technology are described. A 768K-bit embedded SRAM memory with flash controlled column redundancy and built in self-repair is presented.

查看原文本刊更多论文

SRAM嵌入式存储器，低成本，闪存eeprom开关控制冗余

本文介绍了使用低成本的闪存EEPROM开关来控制SRAM嵌入式存储器中的冗余。介绍了闪蒸池的设计、运行和工艺技术。提出了一种768k位嵌入式SRAM存储器，具有flash控制列冗余和内置自修复功能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)

自引率

0.00%

发文量