Highly linear 90-170 GHz SPDT Switch with High Isolation for Fully Integrated InP Transceivers

Abstract

This work reports a high-isolation SPDT switch re-alized in an 800-nm InP DHBT process. The circuit is based on shunt topology employing two cascaded shunt stages. This enhances the isolation while introducing only marginally higher insertion loss. Due to the low intrinsic capacitance of the InP DHBT transistors with 350 GHz fmax, the circuit achieves a bandwidth of from 90 to 170 GHz, with an overall isolation of more than 45 dB and an insertion loss of 3.5 … 5 dB. Moreover, the circuit achieves highly linear operation with measured Pin1dB exceeding 15 dBm at 110 GHz frequency. It consumes a DC power of 5 mW only.