Simulated Covered Wafer Auto Clean (CWAC) to Eliminate First Wafer Effect and Improve Process Capability

Abstract

Variations in etch rates during plasma etching can occur due to differences in the conditioning of the inside surfaces of a plasma reactor. Passivation of the surfaces of the reactor wall by plasma generated species can change the composition of the radicals in plasma and ion fluxes (J) to the wafer and thereby cause variations in etch processes on a wafer-to-wafer basis. Furthermore, ion bombardment of the walls during plasma-on will influence the processes through activation of surface sites. In order to maintain a clean reactor condition, a dry clean method called Wafer-less Auto Clean (WAC) is introduced to clean out any by-products that are re-deposited on the surfaces to achieve steady particle performance during full MTBC (mean time between clean). However, this dry cleaning method can change the condition of the reactor and can cause wafer-towafer process variation. To mitigate process drifts at gate hard mask layer, an innovative method of seasoning etch reactors using simulated covered wafer-less auto clean (S-CWAC) was tested and implemented. The highest variation seen on the 1st wafer to process was reduced by running S-CWAC prior to processing the wafer to pre-coat the reactor walls with films that would otherwise be deposited after etching the production wafer.