Effect of Sneak Path Current in TiOx/HfOx Based 1S1R RRAM Crossbar Memory Array

Abstract

In this work, an electrical model of one Selector-one Resistor (1S1R) memory cell structure consisting of a Pt/Ta2O5/TaOx/TiO2/Pt multi-layer selector and a TiN/TiOx/HfOx/Pt Resistive-RAM (RRAM) is proposed. 1S1R and One Resistor (1R) crossbars of sizes up to 128x128 are designed and simulated using CADENCE Virtuoso. The proposed 1S1R crossbars reduce the sneak path current by up to 99.8%, the voltage drops across the crossbars' lines by up to 97.2% and the total current consumption during writing by up to 98.4%, whilst the unselected cells' states remain unaffected. The effect of the crossbars' size and the writing scheme on the 1S1R performance is comprehensively evaluated in this work. In addition, the read Ion/Ioff ratio is substantially increased. The proposed 1S1R structure can reach relatively large crossbar sizes without sacrificing power efficiency and reliability. Thus, the proposed structure offers the potential to be utilized in implementing high-density RRAM memories.