DSA-Friendly Detailed Routing Considering Double Patterning and DSA Template Assignments*

Abstract

As integrated circuit technology nodes continue to shrink, dense via distribution becomes a severe challenge, requiring multiple masks to avoid spacing violations in via layers. Meanwhile, the directed self-assembly (DSA) technique shows a great promise in via printing by employing feasible guiding templates. Combining DSA with double patterning lithography can significantly reduce the number of masks for via layers. In this paper, we propose a detailed routing algorithm considering DSA with DPL based on a conflict and compatibility graph model. A net planning algorithm is developed to reduce via-dense areas and determines a prerouting nets order, while the graph model is employed to capture the feature of DSA and DPL to better guide detailed routing. Besides, DSA grouping is performed for critical vias during detailed routing to avoid attracting more vias inserted in surrounding grids to reduce via-spacing violations. Experimental results demonstrate that our routing algorithm can effectively minimize the number of via spacing violations, with an even smaller total via count.