An Equivalent Circuit Model for Negative Bias Temperature Instability Effect in 65nm PMOS

Jun’an Zhang, Min Jiang, Qingwei Zhang
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引用次数: 1

Abstract

This paper introduces an equivalent circuit modelfor Negative Bias Temperature Instability (NBTI) effect in 65nm PMOS. Comparing with other models based on physical effect mechanism, the method of equivalent circuit model is more practical. Based on PMOS model of an existing 65nm CMOS PDK, several common electrical components and arithmetic units are utilized to form an equivalent circuit. The components include resistor, voltage source, current source, voltage-controlled voltage source, voltage controlled current source, current controlled current source, adder, multiplier, etc. Four input parameters, such as width of gate (W), length of gate (L), ambient temperature (temp), operation period (t), are included in this equivalent circuit model. This model also considered the voltage stress of drain-source, drain-gate, and gate-source. The simulation results show that the electrical performance of PMOS transistor under NBTI is fitted the measured data of many published papers. The equivalent circuit model will be utilized for long period reliability integrated circuit design in the future.
65纳米PMOS负偏置温度不稳定效应的等效电路模型
介绍了65nm PMOS负偏置温度不稳定性(NBTI)效应的等效电路模型。与其他基于物理效应机理的模型相比,等效电路模型的方法更为实用。基于现有65nm CMOS PDK的PMOS模型,利用几种常见的电子元件和运算单元构成等效电路。元件包括电阻器、电压源、电流源、压控电压源、压控电流源、电流控电流源、加法器、乘法器等。该等效电路模型中包含栅极宽度(W)、栅极长度(L)、环境温度(temp)、工作周期(t)等四个输入参数。该模型还考虑了漏源、漏极和栅源的电压应力。仿真结果表明,PMOS晶体管在NBTI条件下的电性能与多篇论文的实测数据吻合良好。等效电路模型将在未来的长周期可靠性集成电路设计中得到应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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