High performance, ultra high voltage 4H-SiC IGBTs

S. Ryu, C. Capell, Lin Cheng, C. Jonas, A. Gupta, M. Donofrio, J. Clayton, M. O'loughlin, A. Burk, D. Grider, A. Agarwal, J. Palmour, A. Hefner, S. Bhattacharya
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引用次数: 42

Abstract

We present our latest developments in ultra high voltage 4H-SiC IGBTs. A 4H-SiC P-IGBT, with a chip size of 6.7 mm × 6.7 mm and an active area of 0.16 cm2 exhibited a record high blocking voltage of 15 kV, while showing a room temperature differential specific on-resistance of 24 mΩ-cm2 with a gate bias of -20 V. A 4H-SiC N-IGBT with the same area showed a blocking voltage of 12.5 kV, and demonstrated a room temperature differential specific on-resistance of 5.3 mΩ-cm2 with a gate bias of 20 V. Buffer layer design, which includes controlling the doping concentration and the thickness of the field-stop buffer layers, was used to control the charge injection from the backside. Effects on buffer layer design on static characteristics and switching behavior are reported.
高性能,超高压4H-SiC igbt
我们介绍了超高压4H-SiC igbt的最新发展。芯片尺寸为6.7 mm × 6.7 mm,有源面积为0.16 cm2的4H-SiC P-IGBT具有15 kV的高阻断电压,室温差分比导通电阻为24 mΩ-cm2,栅极偏置为-20 V。相同面积的4H-SiC N-IGBT的阻断电压为12.5 kV,室温差分比导通电阻为5.3 mΩ-cm2,栅极偏置为20 V。缓冲层设计包括控制掺杂浓度和场阻缓冲层厚度,以控制从背面的电荷注入。报道了缓冲层设计对静态特性和开关行为的影响。
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