Fast Blocking of Householder Reflectors on Graphics Processors

A. Dominguez, E. S. Quintana‐Ortí
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引用次数: 2

Abstract

We revisit an alternative representation to the compact WY transform for the accumulation (blocking) of Householder reflectors that exhibits the same numerical stability and is composed of efficient computational kernels from Level-3 Basic Linear Algebra Subprograms (BLAS) in contrast with the Level-2 BLAS that are utilized for the construction of the conventional compact WY representation. For the orthogonal reduction to condensed forms on multicore platforms equipped with a fast graphics processing unit (GPU), (or when there is a notable gap in performance between the multicore processors and the graphics accelerator,) our approach removes the assembly of the accumulation from the critical path of the algorithm. This comes as a consequence of accelerating this operation via the use of Level-3 BLAS, moving this computation to the GPU, and allowing the use of larger algorithmic block sizes. Our experiments with the alternative orthogonal representation show considerable speed-ups, which can be in the range 20-40% on recent GPUs when compared with the codes in MAGMA.
图形处理器上家用反射器的快速阻塞
我们重新审视了用于累积(阻挡)Householder反射器的紧凑WY变换的替代表示,该表示具有相同的数值稳定性,并且由来自3级基本线性代数子程序(BLAS)的高效计算核组成,与用于构建传统紧凑WY表示的2级BLAS形成对比。对于在配备快速图形处理单元(GPU)的多核平台上的正交约简到浓缩形式,(或者当多核处理器和图形加速器之间存在显着的性能差距时),我们的方法从算法的关键路径中删除了累积的组装。这是通过使用Level-3 BLAS加速此操作的结果,将此计算移动到GPU,并允许使用更大的算法块大小。我们对替代正交表示的实验显示出相当大的加速,与MAGMA中的代码相比,在最近的gpu上可以在20-40%的范围内。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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