{"title":"Legitimate Skew Clock Routing with Buffer Insertion","authors":"Xinjie Wei, Yici Cai, Meng Zhao, Xianlong Hong","doi":"10.1007/s11265-005-4184-7","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"8 1","pages":"107-116"},"PeriodicalIF":0.0000,"publicationDate":"2006-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of VLSI signal processing systems for signal, image, and video technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/s11265-005-4184-7","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}