Implementations of on sensor image compression and comparisons between pixel and column parallel architectures

K. Aizawa, T. Hamamoto, Y. Ohtsuka, M. Hatori, M. Abe
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引用次数: 7

Abstract

In order to enhance performance of an image sensor, we have been investigating a novel integration of compression and sensing. By this integration, the image signal that has to be readout from the sensor is significantly reduced. Thus, the integration can consequently leads to high pixel rate sensing. The compression scheme we make use of is conditional replenishment that detects and encodes moving areas. We have developed prototypes based on two different architectures, that are pixel parallel and column parallel architectures. We present the two prototypes and their comparisons, and show the results obtained by them.
传感器图像压缩的实现及像素和列并行架构的比较
为了提高图像传感器的性能,我们一直在研究一种新的压缩和感知集成方法。通过这种集成,必须从传感器读出的图像信号显着减少。因此,集成可以导致高像素率感测。我们使用的压缩方案是检测和编码移动区域的条件补充。我们已经开发了基于两种不同架构的原型,即像素并行和列并行架构。本文介绍了两种原型,并对其进行了比较,并给出了所得到的结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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