A Spur-Suppression Technique for Frequency Synthesizer with Pulse-Width to Current Conversion

Po-Yu Hsieh, Shao-Yu Shu, Ching-Yuan Yang
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Abstract

A pulse-width to current conversion circuit is adopted to suppress reference frequency spurious tone of frequency synthesizer. Propose pulse-width to current conversion technique convert pulse-width of input clock signal to modulated output current. This characteristic of pulse-width sensing applies to replace conventional charge-pump of phase-lock loop. Continuous and linear output current improve the reference frequency spur, which results from non-ideal effect of charge-pump. Proposed frequency synthesizer is fabricated with TSMC 0.18µm CMOS process and operation frequency is between 5.12 GHz and 5.28 GHz under the channel width of 10 MHz. The total power consumption is 23 mW without output buffer. The measured output spurious tone is −48.21 dBm and phase noise performance is −102 dBc/Hz at 1 MHz offset.
脉宽电流转换频率合成器的杂散抑制技术
采用脉宽电流转换电路抑制频率合成器的参考频率杂音。提出脉宽电流转换技术,将输入时钟信号的脉宽转换为调制输出电流。这种脉宽传感的特性可以代替传统的锁相环电荷泵。连续和线性输出电流改善了参考频率杂散,这是由于电荷泵的非理想效应造成的。频率合成器采用台积电0.18µm CMOS工艺制作,工作频率在5.12 ~ 5.28 GHz之间,通道宽度为10 MHz。不含输出缓冲器的总功耗为23mw。测量输出杂散音为- 48.21 dBm,相位噪声性能为- 102 dBc/Hz。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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