{"title":"A Spur-Suppression Technique for Frequency Synthesizer with Pulse-Width to Current Conversion","authors":"Po-Yu Hsieh, Shao-Yu Shu, Ching-Yuan Yang","doi":"10.1109/ISPACS48206.2019.8986294","DOIUrl":null,"url":null,"abstract":"A pulse-width to current conversion circuit is adopted to suppress reference frequency spurious tone of frequency synthesizer. Propose pulse-width to current conversion technique convert pulse-width of input clock signal to modulated output current. This characteristic of pulse-width sensing applies to replace conventional charge-pump of phase-lock loop. Continuous and linear output current improve the reference frequency spur, which results from non-ideal effect of charge-pump. Proposed frequency synthesizer is fabricated with TSMC 0.18µm CMOS process and operation frequency is between 5.12 GHz and 5.28 GHz under the channel width of 10 MHz. The total power consumption is 23 mW without output buffer. The measured output spurious tone is −48.21 dBm and phase noise performance is −102 dBc/Hz at 1 MHz offset.","PeriodicalId":6765,"journal":{"name":"2019 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","volume":"8 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPACS48206.2019.8986294","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A pulse-width to current conversion circuit is adopted to suppress reference frequency spurious tone of frequency synthesizer. Propose pulse-width to current conversion technique convert pulse-width of input clock signal to modulated output current. This characteristic of pulse-width sensing applies to replace conventional charge-pump of phase-lock loop. Continuous and linear output current improve the reference frequency spur, which results from non-ideal effect of charge-pump. Proposed frequency synthesizer is fabricated with TSMC 0.18µm CMOS process and operation frequency is between 5.12 GHz and 5.28 GHz under the channel width of 10 MHz. The total power consumption is 23 mW without output buffer. The measured output spurious tone is −48.21 dBm and phase noise performance is −102 dBc/Hz at 1 MHz offset.