InduM: An Accurate probablity Inductance-based Model to Predict Delay in Chips

Abstract

The reliability in many-core and multicore systems is dependent on the correct functionality of communication structure between cores. However, data transfer between cores in these on chip communications can seriously face with crosstalk faults. Timing delay is the most effect of crosstalk faults and so providing a model to predict the delay can reduce the time for designers to provide more efficient mechanisms to decrease crosstalk faults. Accordingly, this paper proposes a probability inductance-based model named InduM to reduce the timing delay in the communication of chips. The main advantages of InduM are: 1) it considers the inductance effects in the model;2) it is based on 5-wire that is more accurate 3) it can be applied to a communication channel with any arbitrary width. To validate the proposed model, SPICE simulations are performed in a various working conditions and delays obtained from simulations compared with those resulting from InduM model. Comparisons show that InduM can efficiently estimate the delay of communication channels with 4-5 % error rate.