Principles of Secure Processor Architecture Design

Jakub Szefer
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引用次数: 9

Abstract

With growing interest in computer security and the protection of the code and data which execute on commodity computers, the amount of hardware security features in today's processors has increased significantly over the recent years. No longer of just academic interest, security features inside processors have been embraced by industry as well, with a number of commercial secure processor architectures available today. This book aims to give readers insights into the principles behind the design of academic and commercial secure processor architectures. Secure processor architecture research is concerned with exploring and designing hardware features inside computer processors, features which can help protect confidentiality and integrity of the code and data executing on the processor. Unlike traditional processor architecture research that focuses on performance, efficiency, and energy as the first-order design objectives, secure processor architecture design has security as the first-order design objective (while still keeping the others as important design aspects that need to be considered). This book aims to present the different challenges of secure processor architecture design to graduate students interested in research on architecture and hardware security and computer architects working in industry interested in adding security features to their designs. It aims to educate readers about how the different challenges have been solved in the past and what are the best practices, i.e., the principles, for design of new secure processor architectures. Based on the careful review of past work by many computer architects and security researchers, readers also will come to know the five basic principles needed for secure processor architecture design. The book also presents existing research challenges and potential new research directions. Finally, this book presents numerous design suggestions, as well as discusses pitfalls and fallacies that designers should avoid.
安全处理器架构设计原理“,
随着人们对计算机安全以及保护在商用计算机上运行的代码和数据的兴趣日益增长,近年来,当今处理器中硬件安全特性的数量显著增加。处理器内部的安全特性不再只是学术界的兴趣,也已被工业界所接受,目前有许多商业安全处理器架构可用。本书旨在让读者深入了解学术和商业安全处理器架构设计背后的原则。安全处理器体系结构研究涉及探索和设计计算机处理器内部的硬件特性,这些特性有助于保护处理器上执行的代码和数据的机密性和完整性。与传统的处理器体系结构研究将性能、效率和能源作为一阶设计目标不同,安全处理器体系结构设计将安全性作为一阶设计目标(同时仍然将其他重要的设计方面作为需要考虑的因素)。本书旨在向对体系结构和硬件安全研究感兴趣的研究生以及对在其设计中添加安全功能感兴趣的行业中的计算机架构师提供安全处理器体系结构设计的不同挑战。它旨在向读者介绍过去如何解决不同的挑战,以及设计新的安全处理器架构的最佳实践(即原则)是什么。基于对许多计算机架构师和安全研究人员过去工作的仔细回顾,读者还将了解安全处理器架构设计所需的五个基本原则。本书还提出了现有的研究挑战和潜在的新研究方向。最后,本书提出了许多设计建议,并讨论了设计师应该避免的陷阱和谬误。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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CiteScore
3.70
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0.00%
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