A Systematic Method for Approximate Circuit Design Using Feature Selection

Abstract

As the size of technology reaches deep nanometer realm, the improvements in area, power, and timing resulting from developments in scaling have started to see a decrease. Alternative approaches to explore design space to achieve energy-efficient digital systems are of great interest in recent years. Approximate computing in hardware design has emerged as a promising paradigm which seeks to trade off the requirement of accuracy for reduction in power consumption and hardware cost. This paper presents a systematic and scalable method for approximate circuit design by employing data-driven feature selection techniques rather than using statistical or theoretical analysis, which is extremely suitable for applications at a larger scale. A case study on approximate multiplier is presented to demonstrate the proposed design flow. Our experimental results show that the proposed approach could achieve better area/power saving and comparable error performance with other existing manual approximate multiplier designs, while greatly reducing the design workload and complexity.