Kasem Khalil, Bappaditya Dey, Ashok Kumar V, M. Bayoumi
{"title":"A Reversible-Logic based Architecture for Convolutional Neural Network (CNN)","authors":"Kasem Khalil, Bappaditya Dey, Ashok Kumar V, M. Bayoumi","doi":"10.1109/MWSCAS47672.2021.9531842","DOIUrl":null,"url":null,"abstract":"Convolutional-Neural-Network (CNN) is a deep learning model, which is used extensively to solve complex image classification or computer vision problems. CNN and more complex architecture variants of it such as vggX, GoogleNet, ImageNet, etc. are widely used in various application domains such as object detection, self-driving cars, instance segmentation, Optical Character Recognition (OCR), surveillance and security systems, etc. However, operations involved under CNN are both computationally as well as memory extensive which further leads to high computational cost, area overhead, and excessive power dissipation against higher accuracy compatible architectures discussed above. In this paper, we have proposed a novel design of fully reversible-logic-based CNN architecture in the context of low-power VLSI (Very-Large-Scale-Integration) circuit synthesis. Ideally, reversible logic operations are lossless due to no information-loss mechanism, which results in Zero-heat dissipation. The proposed architecture has been implemented using VHDL on Altera Arria10 GX FPGA. The comparative analysis demonstrates that the proposed approach has achieved an approximately 19.24% decrease in overall power dissipation compared to the conventional classical approach. The proposed approach also has better scalability than the classical design approach.","PeriodicalId":6792,"journal":{"name":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"25 1","pages":"1070-1073"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS47672.2021.9531842","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Convolutional-Neural-Network (CNN) is a deep learning model, which is used extensively to solve complex image classification or computer vision problems. CNN and more complex architecture variants of it such as vggX, GoogleNet, ImageNet, etc. are widely used in various application domains such as object detection, self-driving cars, instance segmentation, Optical Character Recognition (OCR), surveillance and security systems, etc. However, operations involved under CNN are both computationally as well as memory extensive which further leads to high computational cost, area overhead, and excessive power dissipation against higher accuracy compatible architectures discussed above. In this paper, we have proposed a novel design of fully reversible-logic-based CNN architecture in the context of low-power VLSI (Very-Large-Scale-Integration) circuit synthesis. Ideally, reversible logic operations are lossless due to no information-loss mechanism, which results in Zero-heat dissipation. The proposed architecture has been implemented using VHDL on Altera Arria10 GX FPGA. The comparative analysis demonstrates that the proposed approach has achieved an approximately 19.24% decrease in overall power dissipation compared to the conventional classical approach. The proposed approach also has better scalability than the classical design approach.