R. Jayachandran, D. Jagalchandran, P. C. Subramaniam
{"title":"Planar CMOS and multigate transistors based wide-band OTA buffer amplifiers for heavy resistance load","authors":"R. Jayachandran, D. Jagalchandran, P. C. Subramaniam","doi":"10.2298/fuee2201013j","DOIUrl":null,"url":null,"abstract":"Analog buffer amplifier configurations capable of driving heavy resistive load using different operational transconductance amplifier (OTA) are presented in this paper. The OTA CMOS buffer configurations are designed using 0.18 ?m SCL technology library in Cadence Virtuoso tool and multigate transistor OTA buffer in TCAD Sentaurus tool. CMOS OTA buffer configuration using simple OTA outperform the OTA buffer circuits using other OTAs in terms of power dissipation and stability. Measured results show that the OTA buffer circuit works well for resistive load below 100 ?. The gain tuning of up to 5 V/V is achieved with RL equal to 50 ?, output swing of 1 V. OTA buffer configuration implemented using multigate transistor with resistive load below 1 k? exhibits a bandwidth around 5 GHz and tunable gain up to 5 V/V.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"167 1","pages":""},"PeriodicalIF":0.6000,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Facta Universitatis-Series Electronics and Energetics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.2298/fuee2201013j","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 1
Abstract
Analog buffer amplifier configurations capable of driving heavy resistive load using different operational transconductance amplifier (OTA) are presented in this paper. The OTA CMOS buffer configurations are designed using 0.18 ?m SCL technology library in Cadence Virtuoso tool and multigate transistor OTA buffer in TCAD Sentaurus tool. CMOS OTA buffer configuration using simple OTA outperform the OTA buffer circuits using other OTAs in terms of power dissipation and stability. Measured results show that the OTA buffer circuit works well for resistive load below 100 ?. The gain tuning of up to 5 V/V is achieved with RL equal to 50 ?, output swing of 1 V. OTA buffer configuration implemented using multigate transistor with resistive load below 1 k? exhibits a bandwidth around 5 GHz and tunable gain up to 5 V/V.