An 82nW 0.53pJ/SOP Clock-Free Spiking Neural Network with 40µs Latency for AloT Wake-Up Functions Using Ultimate-Event-Driven Bionic Architecture and Computing-in-Memory Technique

Abstract

Human brain is a natural ultimate-event-driven (UED) system with low power and real-time response-ability, thanks to the asynchronous propagation and processing of spikes. Power dissipation and latency are major concerns in AloT devices, usually operating in random-sparse-event (RSE) scenarios (Fig. 22.7.1, top). Being event-driven on the system level, an always-on wake-up system (WUS) detects the valid RSEs energy-efficiently and intelligently, and upon detection turns on the power-hungry high-performance system (HPS). Being event-driven on the module level, a prior WUS [1] uses asynchronous feature extraction and synchronous convolutional neural network to detect the RSEs, consuming 148nW-to-1.68µW with 348ms latency. On the circuit level, the Spiking Neural Network (SNN) gives natural event-driven property. However, the prior SNN works did not fully explore this nature. An SNN circuit [2] achieves keyword spotting task at 205nW-to-570nW, but the framing method causes 100ms latency and is not true real-time. The SNN core in [5] uses synchronous digital design, which consumes significant power by the clock tree. The asynchronous-in-global synchronous-in-local [3]–[4] SNN circuits use local clock signals. They need arbiters in each layer to sort the spikes, weakening the parallelism and timing; additionally, the separation of storage and computing consumes more energy for data movement.