Analysis of hot-carrier-induced degradation in MOSFETs by gate-to-drain and gate-to-substrate capacitance measurements

Abstract

In this paper we describe and demonstrate the use of gate-to-drain capacitance (C/sub gd/) measurements at cryogenic temperature as a tool to characterize hot-carrier-induced charge centers. Also a new method based on gate-to-substrate capacitance (C/sub gb/), validated by means of two-dimensional numerical simulation, is proposed to extract the spatial distribution of oxide interface charges with reasonable accuracy.