I. Vornicu, R. Carmona-Galán, Á. Rodríguez-Vázquez
{"title":"A CMOS 0.18μm 64×64 single photon image sensor with in-pixel 11b time-to-digital converter","authors":"I. Vornicu, R. Carmona-Galán, Á. Rodríguez-Vázquez","doi":"10.1109/SMICND.2014.6966414","DOIUrl":null,"url":null,"abstract":"The design and characterization of a CMOS 64×64 single-photon avalanche-diode (SPAD) array with in-pixel 11b time-to-digital converter (TDC) is presented. It is targeted for time-resolved imaging, in particular 3D imaging. The achieved pixel pitch is 64μm with a fill factor of 3.5%. The chip was fabricated in a 0.18μm standard CMOS technology and implements a double functionality: Time-of-Flight estimation and photon counting. The imager features a programmable time resolution for the array of TDCs from 625ps down to 145ps. The measured accuracy of the minimum time bin is lower than ±1LSB DNL and 1.7LSB INL. The TDC jitter over the full dynamic range is less than 1LSB. Die-to-die process variation and temperature are discarded by auto-calibration. Fast quenching/restore circuit on each pixel lowers the power consumption by limiting the avalanche currents. Time gatedoperation is possible as well.","PeriodicalId":6616,"journal":{"name":"2014 International Semiconductor Conference (CAS)","volume":"15 1","pages":"131-134"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Semiconductor Conference (CAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMICND.2014.6966414","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 20
Abstract
The design and characterization of a CMOS 64×64 single-photon avalanche-diode (SPAD) array with in-pixel 11b time-to-digital converter (TDC) is presented. It is targeted for time-resolved imaging, in particular 3D imaging. The achieved pixel pitch is 64μm with a fill factor of 3.5%. The chip was fabricated in a 0.18μm standard CMOS technology and implements a double functionality: Time-of-Flight estimation and photon counting. The imager features a programmable time resolution for the array of TDCs from 625ps down to 145ps. The measured accuracy of the minimum time bin is lower than ±1LSB DNL and 1.7LSB INL. The TDC jitter over the full dynamic range is less than 1LSB. Die-to-die process variation and temperature are discarded by auto-calibration. Fast quenching/restore circuit on each pixel lowers the power consumption by limiting the avalanche currents. Time gatedoperation is possible as well.