A multimode CT ΔΣ-modulator with a reconfigurable digital feedback filter for semi-digital blocker/interferer rejection

Abstract

This paper presents a multimode-mode filtering ΔΣ-modulator for receivers with reconfigurable digitally enhanced blocker rejection. The required signal to noise ratio of the signal of interest is typically much lower than the required DR due to also received interfering signals. Therefore, it is of interest to build the ADC in the receiver with a high blocker tolerance, to reduce its required signal to noise ratio and even relax the rest of the receiver chain. For this purpose, a semi-digital implementation of a reconfigurable and frequency selective interferer suppression is proposed. The prototype is designed in a 28nm CMOS technology, occupies an area of 0.089mm2 and achieves 59.4/57.9/50.4dB inband SNDR in a bandwidth of 8.9/18.3/38.3MHz, together with a power consumption of 12.5/14.3/15.6mW. Using the proposed technique, the modulator simultaneously achieves a out-of-band blocker tolerance which is even +18dB beyond full scale.