Study of GIDL Improvement for 2T-SONOS Flash

Zhenghong Liu, Liqun Dong, R. Qi, Shugang Dai, Guanqun Huang, Haoyu Chen, Chris Shao
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Abstract

The improvement of Gate induced drain leakage (GIDL) is studied in 2T SONOS (silicon-oxide-nitride-oxide-silicon) nonvolatile memory. High GIDL current from the select gate (SG) introduce inhibit disturb to the neighbor SONOS gate. It is found that these leakage bits impact the overall yield and reliability. In this paper, the variation trend of GIDL leakage with LDD dopant dose, energy and tilt is investigated in detail Results show that GIDL leakage is effectively decreased through increasing tilt and energy or decreasing the dose amount of select gate LDD IMP step. In addition, GIDL leakage also decreased by changing SG LDD dopant step from post poly re-oxidation to post spacer1 etch which increased the space of SG gate to drain. The proposed condition improves GIDL current by one order of magnitude; yield and Vt window are also greatly increased.
2T-SONOS Flash的GIDL改进研究
研究了2T SONOS(二氧化硅-氮化氧化物-硅)非易失性存储器中栅极诱发漏极(GIDL)的改善方法。来自选择门(SG)的高GIDL电流对相邻的SONOS门引入抑制干扰。发现这些泄漏钻头影响了整体屈服和可靠性。研究了GIDL泄漏量随LDD掺杂剂剂量、能量和倾斜度的变化趋势。结果表明,通过增加倾斜度和能量或减小选择栅LDD IMP阶跃的剂量量,可以有效地降低GIDL泄漏量。此外,将SG LDD掺杂步骤由后聚再氧化改为后间隔蚀刻,增加了SG栅极漏极的空间,也减少了GIDL漏极。该条件使GIDL电流提高了一个数量级;产量和Vt窗也大大增加。
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