Zhenghong Liu, Liqun Dong, R. Qi, Shugang Dai, Guanqun Huang, Haoyu Chen, Chris Shao
{"title":"Study of GIDL Improvement for 2T-SONOS Flash","authors":"Zhenghong Liu, Liqun Dong, R. Qi, Shugang Dai, Guanqun Huang, Haoyu Chen, Chris Shao","doi":"10.1109/CSTIC49141.2020.9282396","DOIUrl":null,"url":null,"abstract":"The improvement of Gate induced drain leakage (GIDL) is studied in 2T SONOS (silicon-oxide-nitride-oxide-silicon) nonvolatile memory. High GIDL current from the select gate (SG) introduce inhibit disturb to the neighbor SONOS gate. It is found that these leakage bits impact the overall yield and reliability. In this paper, the variation trend of GIDL leakage with LDD dopant dose, energy and tilt is investigated in detail Results show that GIDL leakage is effectively decreased through increasing tilt and energy or decreasing the dose amount of select gate LDD IMP step. In addition, GIDL leakage also decreased by changing SG LDD dopant step from post poly re-oxidation to post spacer1 etch which increased the space of SG gate to drain. The proposed condition improves GIDL current by one order of magnitude; yield and Vt window are also greatly increased.","PeriodicalId":6848,"journal":{"name":"2020 China Semiconductor Technology International Conference (CSTIC)","volume":"43 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 China Semiconductor Technology International Conference (CSTIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC49141.2020.9282396","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The improvement of Gate induced drain leakage (GIDL) is studied in 2T SONOS (silicon-oxide-nitride-oxide-silicon) nonvolatile memory. High GIDL current from the select gate (SG) introduce inhibit disturb to the neighbor SONOS gate. It is found that these leakage bits impact the overall yield and reliability. In this paper, the variation trend of GIDL leakage with LDD dopant dose, energy and tilt is investigated in detail Results show that GIDL leakage is effectively decreased through increasing tilt and energy or decreasing the dose amount of select gate LDD IMP step. In addition, GIDL leakage also decreased by changing SG LDD dopant step from post poly re-oxidation to post spacer1 etch which increased the space of SG gate to drain. The proposed condition improves GIDL current by one order of magnitude; yield and Vt window are also greatly increased.