MultiExplorer: A tool set for multicore system-on-chip design exploration

Abstract

This paper proposes MultiExplorer, a new toolset for MPSoCs modelling, experimentation, and design space exploration, by combining fast high-abstraction simulation and low-level physical estimates (power, area, and timing). The MultiExplorer infrastructure takes a range of high and low-level parameters to improve accuracy in the design of a multiprocessor system on a chip. Our toolset results show a viable alternative to explore multiprocessor scalability (1-64 cores) on affordable simulation times.