A 2.5-5MHz 87% Peak Efficiency 48V-to-1V Integrated Hybrid DC-DC Converter Adopting Ladder SC Network with Capacitor-Assisted Dual-Inductor Filtering

Abstract

With the rapid developments in big data analytics, non-isolated 48V-to-1V converters offer a competitive choice to support the increased power consumptions in CPUs and memories. For realizing a small output-to-input conversion ratio (CR), the conventional buck (CB) converters suffer from extremely short switch on-time that limits high-frequency operation and incurs high power losses. Although the switched-capacitor (SC) converters with lower voltage rating devices can scale down the high input voltage, $\mathsf{V}_{\mathsf{lN}}$, high efficiency can only be achieved under fixed conversion ratios. Hybrid converters are thus emerged recently to combine the advantages of CB and SC converters. Converter topologies such as flying-capacitor multi-level (FCML) [1] and hybrid Dickson (HD) [2] adopt an external output LC filter after the SC network to realize continuous conversion range. However, since flying capacitor in [1] and [2] requires proper voltage balancing in the steady state, the switching frequency, $\mathsf{f}_{\mathsf{SW}}$, can be significantly slowed down when the converter needs to balance an increased number of the flying capacitor under small CR condition. Both double step-down (DSD) [3] and tri-state DSD [4] topologies can double $\mathsf{f}_{\mathsf{SW}}$ by using two inductors, but their CR is only $\mathsf{D}/2$ that limits their capability to support 48V-to-1V conversions. Although the 12-level series-capacitor converter [5] topology significantly decreases the CR, it requires 11 flying capacitors and a $\mathsf{GaN}$ FET as external components. The converter also has 24 on-chip power transistors to support 12-phase operation, resulting in a large chip area.