An audio ADC delta-sigma modulator with 100 dB SINAD and 102 dB DR using a second-order mismatch-shaping DAC

E. Fogleman, Jared Welz, I. Galton
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引用次数: 68

Abstract

A second-order audio ADC /spl Delta//spl Sigma/ modulator using a low-complexity 33-level second-order mismatch-shaping DAC is presented. The DAC encoder is designed to reduce signal-dependent DAC noise modulation. The prototype was implemented in a 3.3 V 0.5 /spl mu/m single-poly CMOS process, and it achieves 100 dB SINAD and 102 dB DR.
一个音频ADC δ - σ调制器,具有100 dB SINAD和102 dB DR,使用二阶错配整形DAC
提出了一种采用低复杂度33级二阶失配整形DAC的二阶音频ADC /spl Delta//spl Sigma/调制器。DAC编码器设计用于减少与信号相关的DAC噪声调制。该原型在3.3 V 0.5 /spl mu/m单多CMOS工艺中实现,实现了100 dB SINAD和102 dB DR。
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