{"title":"DigiLogue: Ultra-Fast and Ultra-Power-Efficient Signal Processing for Tbps Wireless Systems","authors":"K. Nikitopoulos, Mahmoud Mojarrad Kiasaraei","doi":"10.1109/GCWkshps52748.2021.9682067","DOIUrl":null,"url":null,"abstract":"Unlocking new wireless applications such as mobile extended reality and holographic telepresence necessitates ultra-power efficient systems that are able to support data rates of hundreds of gigabits per second. Utilizing the multi-gigahertz bandwidth that is currently available in higher frequencies (e.g., millimeter-wave or terahertz) is a promising pathway in this direction. However, exploiting such ultra-wide bandwidths by using conventional transceiver processing brings us in front of significant challenges in terms of power consumption and signal processing speed. For example, the power consumption of high-precision and ultra-high-speed digital-to-analogue and analogue-to-digital converters (DAC/ADC) for ultra-wide band-widths becomes impractical. At the same time, conventional, state-of-the-art signal processing functionalities, like detection and decoding are becoming not only too power-hungry but also too complex to meet the corresponding latency requirements of ultra-fast systems. In order to overcome these challenges, we herein propose a shift towards \"DigiLogue\" transceiver processing, according to which, computationally intensive and power-hungry digital signal processing tasks take place directly in the analogue domain, avoiding traditional signal up/down-conversion and ADC/DACs, but still preserving the performance of traditional, near-optimal, digital transceiver algorithms. In this context, we give the first example of a simple to realize joint detection/decoding scheme that outperforms existing analogue-domain approaches and reaches the performance of digitally optimal solutions with power consumption that can be up to two orders of magnitude less.","PeriodicalId":6802,"journal":{"name":"2021 IEEE Globecom Workshops (GC Wkshps)","volume":"7 1","pages":"1-6"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE Globecom Workshops (GC Wkshps)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GCWkshps52748.2021.9682067","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Unlocking new wireless applications such as mobile extended reality and holographic telepresence necessitates ultra-power efficient systems that are able to support data rates of hundreds of gigabits per second. Utilizing the multi-gigahertz bandwidth that is currently available in higher frequencies (e.g., millimeter-wave or terahertz) is a promising pathway in this direction. However, exploiting such ultra-wide bandwidths by using conventional transceiver processing brings us in front of significant challenges in terms of power consumption and signal processing speed. For example, the power consumption of high-precision and ultra-high-speed digital-to-analogue and analogue-to-digital converters (DAC/ADC) for ultra-wide band-widths becomes impractical. At the same time, conventional, state-of-the-art signal processing functionalities, like detection and decoding are becoming not only too power-hungry but also too complex to meet the corresponding latency requirements of ultra-fast systems. In order to overcome these challenges, we herein propose a shift towards "DigiLogue" transceiver processing, according to which, computationally intensive and power-hungry digital signal processing tasks take place directly in the analogue domain, avoiding traditional signal up/down-conversion and ADC/DACs, but still preserving the performance of traditional, near-optimal, digital transceiver algorithms. In this context, we give the first example of a simple to realize joint detection/decoding scheme that outperforms existing analogue-domain approaches and reaches the performance of digitally optimal solutions with power consumption that can be up to two orders of magnitude less.