A 278 GHz heterodyne receiver with on-chip antenna for THz imaging in 65 nm CMOS process

Abstract

A low power 278-GHz CMOS zero-IF heterodyne receiver is presented in this paper. The circuit includes a passive mixer, a baseband amplifier, a 278-GHz triple push sub-harmonic injection locked oscillator and an integrated antenna. The receiver measured maximum conversion gain is -12 dB and the DC power consumption is 47 mW. The on-chip antenna size is 390×280 μm2. The heterodyne receiver is used as a THz detector for imaging. It is shown that thanks to the heterodyne structure and the oscillator locking the THz image quality and contrast increases significantly. The imaging system achieves a noise equivalent power (NEP) of 0.2 fW/Hz.