A new digital peak current mode DC-DC converter using FPGA delay circuit and simple A-D converter

F. Kurokawa, K. Kajiwara, Y. Shibata, Y. Yamabe, T. Tanaka, K. Hirose
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引用次数: 8

Abstract

This paper presents a new digital peak current mode dc-dc converter using a FPGA delay circuit and a simple A-D converter. The peak current detection circuit is only composed of RC integrator and field programmable gate array (FPGA) delay circuit. The sampling point of detected current is changed by the feedback value of output voltage. The RC integrator is performed as the A-D converter for the current. The proposed method can detect the peak point of current in real time and shows a superior transient response. As a result, the convergence time and undershoot of output voltage are suppressed to one third and one fourth, respectively.
采用FPGA延时电路和简单的模数转换器设计了一种新型数字峰值电流模式DC-DC变换器
本文提出了一种新的数字峰值电流型dc-dc变换器,采用FPGA延迟电路和简单的模数转换器。峰值电流检测电路仅由RC积分器和现场可编程门阵列(FPGA)延迟电路组成。输出电压的反馈值改变了检测电流的采样点。RC积分器作为电流的A-D转换器。该方法能实时检测电流峰值点,具有良好的瞬态响应性能。因此,输出电压的收敛时间和欠冲分别被抑制到三分之一和四分之一。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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