X. Jordà, M. Vellvehí, F. Madrid, J. Gálvez, P. Godignon, J. Millán
{"title":"Comparison Between Simulated and Experimental Thermal Resistances of Power Devices Using an Specific Test Chip","authors":"X. Jordà, M. Vellvehí, F. Madrid, J. Gálvez, P. Godignon, J. Millán","doi":"10.1109/ESIME.2006.1644034","DOIUrl":null,"url":null,"abstract":"Thermal simulation is nowadays the basic thermal management design tool to predict temperature distributions and power fluxes of complex assemblies. Nevertheless, the simulation results can be inaccurate due to the uncertainty of the values of the parameters involved in the modelisation, as it is the case of the dielectric layer of the IMS substrates. We propose a methodology for the in-situ measurement of the thermal conductivity of this dielectric layer. Two typical power assembly structures based on two types of substrates and a thermal assessment chip, have been simulated and their thermal resistance deduced. The corresponding experimental results have validated the simulations and, consequently, the thermal conductivity extraction method proposed","PeriodicalId":60796,"journal":{"name":"微纳电子与智能制造","volume":"12 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"微纳电子与智能制造","FirstCategoryId":"1087","ListUrlMain":"https://doi.org/10.1109/ESIME.2006.1644034","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Thermal simulation is nowadays the basic thermal management design tool to predict temperature distributions and power fluxes of complex assemblies. Nevertheless, the simulation results can be inaccurate due to the uncertainty of the values of the parameters involved in the modelisation, as it is the case of the dielectric layer of the IMS substrates. We propose a methodology for the in-situ measurement of the thermal conductivity of this dielectric layer. Two typical power assembly structures based on two types of substrates and a thermal assessment chip, have been simulated and their thermal resistance deduced. The corresponding experimental results have validated the simulations and, consequently, the thermal conductivity extraction method proposed