A novel area-efficient MOSFET-C filter design methodology

Abstract

This paper proposes a novel area-efficient and cost-effective design methodology for MOSFET-C continuous-time filters. The new methodology reduces the number of MOS transistors used in the previously reported work by almost a factor of two. A third-order leapfrog low-pass Chebyschev filter is realized and simulated as an example to demonstrate the validity of the new design methodology.