Functional cache simulator for multicore

Abstract

This paper presents the design and construction of a light-weight execution-driven cache simulator for multicore CPU. We implement the simulator as a Pin tool, running on top of Pin, a dynamic instrumentation tool developed by Intel. We then use it to study the cache behavior of 13 multithreaded programs selected from the two well-recognized benchmark suites, SPLASH2 and PARSEC. We plan to release the tool as open-source software and hope that the computer architecture research community would benefit from it.