A low-power LDO circuit with a fast load regulation

2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2016-10-01 DOI:10.1109/APCCAS.2016.7803892

Y. Jang, Seong-Eun Cho, Byungsub Kim, J. Sim, Hong-June Park

引用次数: 3

Abstract

By adding a Miller frequency compensation to the conventional LDO circuit that combines the super source follower and the voltage spike detection, a low-power LDO circuit is proposed to drive the load capacitance up to 10 pF with a fast load regulation. The LDO circuit converts a 5 V input to a 3.3V output, consumes 26 μA, and settles in 75 ns at a 10 mA load current step in 1ns.

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具有快速负载调节的低功耗LDO电路

通过在传统的LDO电路中加入米勒频率补偿，将超级源跟随器和电压尖峰检测相结合，提出了一种低功耗LDO电路，可以快速调节负载，驱动负载电容达到10 pF。LDO电路将5v输入转换为3.3V输出，功耗26 μA，在10ma负载电流阶跃下，在1ns内稳定在75ns。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

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